
OpenPiton release 5 (17-06-11-r5) is here and it will provide a big productivity boost for you.
Headline features of release 5 are:
- Supporting networking using 100Mbps Ethernet, enabling you to connect OpenPiton to the Internet via the ethernet port on your Genesys2 or Nexys Video board
- Adding chip-level ASIC synthesis scripts to produce synthesized netlists for configurable sizes of tile fabrics
Other changes include:
- Moving to Debian sparc64 (stretch/sid) which uses a full 64-bit userland
- Updating to Linux kernel 4.9 to bring in many recently upstreamed SPARC improvements
- General improvements to OS stability on FPGA
- Increasing the supported SD card size to 2GB
- Streamlining SD writing by reversing image byte order to remove an objcopy
- Increasing system frequency on Genesys2 to 66.67MHz
- Increasing Genesys2 DDR rate to 1600MT/s
- Decreasing system frequency on VC707 to 60MHz to better guarantee that implementation meets timing
- Including a pre-built GCC cross-compiler with sparc64 sysroot to cross-build tools and benchmarks
We also did some spring cleaning in the form of:
- Removing an unnecessary Perl distribution
- Removing deprecated FPGA synthesis scripts
Please post in our Google Group if you have any questions or issues with the platform. We already have new features in testing for our next release. So keep an eye out for another release soon.

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